Login
Username:

Password:

Remember me



Lost Password?

Register now!

Sections

Who's Online
166 user(s) are online (161 user(s) are browsing Forums)

Members: 1
Guests: 165

kas1e, more...

Support us!

Headlines

 
  Register To Post  

SAM alignment??
Just can't stay away
Just can't stay away


See User information
Could someone please explain again, what is the alignment issue with sam440 machines?? Does it have to do with floating point operations, or am I totally mistaken??

I have learned, that Wipeout crashes at a fmr (float move register) instruction (I know this is debatable, but if it is true, then we might have fount the cause of the problem).

Sadly the serial crash log doesn't write the contents of the floating point registers, and it is impossible to get to the grim reaper, because the machine locks up...

Go to top
Re: SAM alignment??
Not too shy to talk
Not too shy to talk


See User information
there are some threads on here and on aw.net like this, i have no idea if they are useful or not

1

2

3

4

Go to top
Re: SAM alignment??
Just can't stay away
Just can't stay away


See User information
@derfs

Thanks for the input! So floats have to be 8 byte aligned, no...?

It seems though, that this could not possibly be related to a crash on a fmr instruction, so I guess I am back at the old drawing board...

Go to top
Re: SAM alignment??
Just popping in
Just popping in


See User information
Quote:

alfkil wrote:
@derfs

Thanks for the input! So floats have to be 8 byte aligned, no...?

It seems though, that this could not possibly be related to a crash on a fmr instruction, so I guess I am back at the old drawing board...


Unlikely, but there is another problem with the fmr instruction on the Sam versus that on the earlier PPCs:

A number of the FP instructions exist in both a "recording" form and a non-recording form, based on the Rc bit (bit 31) in the instruction coding.

eg, fmr has a 0 in bit 31
fmr. has a 1 in bit 31

(the dot after the fmr is the usual assembler representation of the recording form)

If FP "recording", then bits 0..3 of the FPCSR are copied into the CR1 field of the Condition Register at the end of the instruction.

Unfortunately, the 440ep SOCs do not support the recording form of FP instructions (though they do support, or course, the similar recording form of the Fixed Point instructions).

As of PowerISA V2.02, the group or recording FP instrus has been separated out into a different "category" in the instruction set, so it is kosher for an embedded processor which supports FP not to support them.

I don't think they were used much, by my Modula-2 compiler was generating "fmr." in some places and I had to change that when my Sam arrived to get programs that used it not to crash.

Tom



Go to top
Re: SAM alignment??
Just can't stay away
Just can't stay away


See User information
@tbreeden

Thanks for the clear up, I have not found any fmr. instructions in Wipeout, though, so that's not the problem.

Now, I am not sure about all this alignment thing: Does single precision floats have to be 8 byte aligned as well, or do they only require longword alignment?? The code is doing stuff like:

lfs f13,@_toc239c(r2)

(Where r2 is aligned to 8 bytes, and @_toc239c is an odd offset)

Go to top

  Register To Post

 




Currently Active Users Viewing This Thread: 1 ( 0 members and 1 Anonymous Users )




Powered by XOOPS 2.0 © 2001-2024 The XOOPS Project