@Hans
Quote:
If it's the latter, then check whether the master and memory enable bits are set in the PCI_COMMAND register (enable I/O accesses
too if you have an I/O BAR). You need to enable those bits in order to access the memory.
I think that could be what I'm missing. At least this I never read/heard of yet, compared to what balaton, jeorg etc wrote. That
all I knew from the virtio spec etc.
Another topic which comes to my mind. do I have take care of the cpu caches? Maybe I just writing/reading into/from the cache and the real memory isn't updated?