Hi balaton,
First, thank you for your work on Qemu for the AmigaOne systems; I'm super excited to see this coming to fruition.
I read through the forum here and came up with this process to git and build Qemu with AmigaOne support for my Ubuntu 20.04 Intel-based Linux box:
# git clone
http://scm.osdn.net/gitroot/qmiga/qemu.git# cd qemu
# git checkout amigaone
# ./configure
# make
# make install
The result was this:
# qemu-system-ppc -M help
Supported machines are:
40p IBM RS/6000 7020 (40p)
amigaone Eyetech AmigaOne/Mai Logic Teron
...
It looks good so far.
I then used AmiDVD to build a custom AmigaOne 4.1 Final Edition ISO image with the siliconmotion502.chip and updated both kicklayouts as directed in:
https://www.amigans.net/modules/newbb/ ... id=138684#forumpost138684I created the u-boot-amigaone.bin and obtained the VGABIOS-lgpl-latest.bin file.
Then I start the machine with:
qemu-system-ppc \
-M amigaone \
-device VGA,romfile=VGABIOS-lgpl-latest.bin \
-device sm501 -accel tcg \
-drive if=none,id=cd \
-device ide-cd,drive=cd,bus=ide.1 \
-drive if=none,id=hd,file=AmigaOne.img,format=raw \
-device ide-hd,drive=hd,bus=ide.0 -m 2048 \
-device es1370 \
-rtc base=localtime \
-device rtl8139,netdev=network01 -netdev user,id=network01 \
-display sdl \
-serial stdio \
-d unimp,guest_errors \
-trace enable="via*"
At this point, I configured U-Boot to boot CDROM and started getting errors:
articia_reg_write: Unimplemented register write 0x80 1 <- 3a
articia_reg_write: Unimplemented register write 0x80 1 <- 3b
articia_reg_write: Unimplemented register write 0x80 1 <- 50
articia_reg_write: Unimplemented register write 0x80 1 <- 53
articia_reg_write: Unimplemented register write 0x80 1 <- 56
via_isa_write addr 0x85 val 0x3 len 0x1
via_superio_write addr 0xe2 val 0x1c
via_superio_cfg: unimplemented register 0xe2
via_superio_write addr 0xe6 val 0xde
via_superio_cfg: unimplemented register 0xe6
via_superio_write addr 0xe7 val 0xfe
via_superio_cfg: unimplemented register 0xe7
via_superio_write addr 0xe8 val 0xbe
via_superio_cfg: unimplemented register 0xe8
via_isa_write addr 0x85 val 0x1 len 0x1
Then this repeats forever:
via_isa_write addr 0x10 val 0xffffffff len 0x4
via_isa_write addr 0x14 val 0xffffffff len 0x4
via_isa_write addr 0x18 val 0xffffffff len 0x4
via_isa_write addr 0x1c val 0xffffffff len 0x4
via_isa_write addr 0x20 val 0xffffffff len 0x4
via_isa_write addr 0x24 val 0xffffffff len 0x4
via_pm_write addr 0x10 val 0xffffffff len 0x4
via_pm_write addr 0x14 val 0xffffffff len 0x4
via_pm_write addr 0x18 val 0xffffffff len 0x4
via_pm_write addr 0x1c val 0xffffffff len 0x4
via_pm_write addr 0x20 val 0xffffffff len 0x4
via_pm_write addr 0x24 val 0xffffffff len 0x4
Invalid read at addr 0xFD0E0000, size 1, region '(null)', reason: rejected
Invalid read at addr 0xFD0E0001, size 1, region '(null)', reason: rejected
Invalid read at addr 0xFD0E0002, size 1, region '(null)', reason: rejected
Invalid read at addr 0xFD0E0003, size 1, region '(null)', reason: rejected
Invalid read at addr 0xFD0E0004, size 1, region '(null)', reason: rejected
Invalid read at addr 0xFD0E0005, size 1, region '(null)', reason: rejected
...
Invalid read at addr 0xFD0E0FFD, size 1, region '(null)', reason: rejected
Invalid read at addr 0xFD0E0FFE, size 1, region '(null)', reason: rejected
Invalid read at addr 0xFD0E0FFF, size 1, region '(null)', reason: rejected
articia_reg_write: Unimplemented register write 0x80 1 <- b0
articia_reg_write: Unimplemented register write 0x80 1 <- b0
My virtual Sam460 is working well.
Thoughts on what I've done wrong?
cheers,
Bill "tekmage" Borsari