A1222+ memory interleaving

Please,

do somebody know, if A1222+ can use memory bank interleaving?

I am using 8 GB memory with 2 ranks - i.e 2Rx8. All 8 GB are recognized. U-Boot:

So according the P1022 reference manual it has Chip select interleaving support. But I am not sure, if chip select signal can select different ranks in one physical module.

I also not found any suitable U-Boot command to check this ( like dramcfg on X1000 ).
And if I compare Ragemem speed, it is the same like eliyahu has in his great article. And his memory is 1Rx16.

Do you have any idea how to test it?
Or do somebody know well memory topology - is memory interleaving possible with this motherboard configuration? ( only one module )

Thank for ideas.

@sailor

Yes, that is the whole idea behind rank interleaving. Each rank has its own chip select.

See my explaination here: https://www.amigans.net/modules/newbb/ ... id=128527#forumpost128527

By saving activation and precharge commands, you'll reduce overall latency and therefore gain about 10% speed.

If supported by the P1022 the it still needs to be activated in uboot. The X5000 has a environmental variable for that which is set to rank interleaving (and controller interleaving) by default.

@geennaam

It looks like this is the line you are thinking of on the X5000:

hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1;usb1:dr_mode=host,phy_type=utmi;usb2:dr_mode=host,phy_type=utmi

Here is the hwconfig on the A1222:

hwconfig=esdhc;audclk:12;usb1:dr_mode=host,phy_type=ulpi

From P1022 manual:

If I assume, that used ranks are bank 0 and bank 1,
I would test to add bank_intlv=cs0_cs1 to hwconfig, but it still depends if A1222+ U-Boot has this parameter in this exact form.

Do somebody have U-Boot manual or more deeper information?

@geennaam - I read your great explanation, and that is why I am checking this on P1022. Thx!

@sailor

It's a uboot env. Not specific to the X5000. The question is if the variable is just ignored or actually implemented for the P1022.

If you want to be on the safe side then you can clone your sdcard first with eg. win32diskimager. And then try adding the following to hwconfig env: fsl_ddr:bank_intlv=cs0_cs1 and see what happens.

@geennaam
good idea. I cloned my SDcard already, but only to NGFS disk on A1222+, which shouln't be enough for A1222+ recovery

@sailor
Quote:

Fortunately U-Boot is GPL so if all else fails one can check the source to know exactly what is it doing and what is supported or not. That's probably better than any documentation.

@balaton

Yes, however, I don't think the A1222 changes are available anywhere. Not sure if Trevor owns it or Matthew or both (as A-EON).

-- eliyahu

And simpliest way how to clone card shuld be do it on A1222+ directly with SDclone.

Is it possible ( and safe ) to remove microSD with U-Boot from running system?

It should be, because AmigaOS not use the SD, but want to be sure. Not want to destroy my only B-Boot

Edit: I found external USB SDC reader, and successfuly made backup with A1222+.

Just tested interleaving with:
hwconfig=esdhc;fsl_ddr:bank_intlv=cs0_cs1;audclk:12;usb1:dr_mode=host,phy_type=ulpi

the good thing: A1222+ not bricked
the bad thing: interleaving not working - both output from UBoot and ragemem speed are the same

@balaton
please, do you have any idea what u-boot repo is closest to our A1222+? There are hundreds of them on git.

@all
please, are there any way how ask A1222+ U-boot developers?

@sailor
Quote:
No idea, probably none of them.
Quote:
The GPL says that whoever distributes binaries of GPL code should also accompany it with the source or at least an address where you can get the source. So contact whover sent you the board that contains the U-Boot binary and they should sort it out otherwise they would illegally distribute binaries they are not allowed to so they should stop doing that and play by the rules.

@sailor

Uboot is open source and you can request a copy from the ExecSG team. I would try Steven Solie.
amigaboot is owned by Trevor and is closed source.

Maybe the A1222+ has it's DDR on chip selects two and three.

You can try fsl_ddr:bank_intlv=cs2_cs3

Or maybe fsl_ddr:bank_intlv=auto works for you.

If they are on 0,2 1,3 or 0,3 then it is game over.

@geennaam
thank you, it will ne nice!

Just now I tested both fsl_ddr:bank_intlv=cs2_cs3 and fsl_ddr:bank_intlv=auto, with the same result - speed is the same like eliyahu`s 1R memory.

Also can be, that option in A1222 U-Boot missing.

@sailor

Can you give a bit more output? Is it using the SPD for configuration?

This line missing in A1222+ log:



P.S: this log is without any fsl_ddr: parameter. But with it logs not differs.

@sailor

Ok forget that SPD line, it is only printed for the X5000.

I don't see any particular restriction in u-boot why the Tabor would not support interleaving.

Tabor is configured for 1 DIMM with 2 chip selects.

It should be using SPD info

It should activate bank interleaving when the env is set properly and have found dual rank memory.

The line "DDR Chip-Select Interleaving Mode: CS0+CS1" Should be printed when it is activated.

But since the line isn't printed it clearly isn't activated for you.

It takes a deep dive to find the root cause why bank interleaving is not enabled. Which is a bit too much effort for me at the moment.

@geennaam
thanks for support!

I have some experience with DRAM on the A1222.
I can offer a few details, and a path to get more.

I've been absent, and I only came here today because a friend suggested I check this topic out. I'm not "gone forever", but a new job, a move to a new state, and WAY too many personal obligations have effectively eliminated Amiga time for me, for a while anyway.

Fair Warning: There are some "adjustments" that have been made to get P1022 RAM to accommodate AmigaOS. Just because "UBOOT" , or just because "Linux" DOES NOT MEAN that AmigaOS on the same board will offer the same features. That's as deep as I'll go on that.

I HAVE looked at a LOT of RAM SPD data on the A1222, and I recall at least one stick that looked like two sticks according to SPD. I tested a LOT of ram, some worked, some did not. Too long of a story to tell.

I have written two rather crude tools for SPD.
One gathers the SPD data and outputs a data file, the second reads that data and does SOME (not all) decoding and translation.
These tools are offered freely to anyone who wants them.
Since they were written for A1222, they only look at the first stick of RAM, but anyone with a bit of play time could expand them to see additional sticks on a X5000 easily enough.


I don't have a website. I'll find the tools and forward it to anyone who asks me, be patient as it might take a day or two.
Anyone whom gets these tools is free to re-distribute however they see fit.

No warranty is expressed or implied, use at your own risk.. all the usual.

lylehaze at gmail dot com.

All I missed is "What is SPD"??
RAM sticks carry a small ROM that describes their size, speeds, and capabilities. The computer reads that and then adjust the hardware to make best use of the RAM abilities. There are various versions, revisions and formats. You can read SPD directly from a UBOOT command line, but it's not graceful.

Those asking for these tools will probably just get a forwarded email, as I don't currently have an A1222 to boot up.

Have Fun,
lylehaze

@LyleHaze

Hi!

I will send you an mail and ask for the tools.
But IMHO tools like this doesn't deserve to be buried in a forum post even if the output probably is only readable for people with insight, they should be available online on os4depot or similar :)

@smf
Maybe you can ask permission to put them on os4depot, included sources for further development.