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Re: A1222+ memory interleaving
Quite a regular
Quite a regular


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Off topic:

The SPD is a small EEPROM on the DIMM which contains paramenters such as timing for that DIMM. Timing is normally very relaxed, such that it should work with every memory controller for a given operating frequency (JEDEC timing). A 1866MT/s DIMM operating at just 1300MT/s can benefit from reduced latencies. Especially in case of AmigaOS where access tends to be random instead of streaming.

Our u-boot is old and lacks the functionality to adjust DDR timing.

I have been playing with the thought of creating a small tool which allows you to adjust the timing stored in the SPL instead. (If the EEPROM is not write protected)

Needless to say that this would be a tool for advanced users only.


Edited by geennaam on 2024/3/26 11:41:41
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Re: A1222+ memory interleaving
Just popping in
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I sent a copy to Sailor, this is the first time I've had an Amiga booted up since then. (Life is very busy)

I'm usually happy to upload to the Depot, but in this case the code is really rough. It's shell only, it doesn't even have reasonable tests to make sure it's on the "right" hardware. (Freescale only, good on A1222, PROBABLY good on X5000).
Before I release something to the world, I try to at least do some basic "best practices", and this code has none of that.

Short: I was digging deeper into some A1222 debugging, and I needed to know more about the actual RAM specifications. It was easier to read and decode the SPD than doing actual research on SODIMM part numbers.
I only just got it working when it gave me the answers I needed, and I was then off to use that information to finish the debugging problem.

Now it's Saturday morning, it looks like I might have a day to spend on Amiga, but I have other projects that would benefit a wider audience. I hate to say that it's just not worth my time, but time is really precious right now.

Reading SPD data is not really fun or useful for most folks anyway. ;)
What WOULD be cool is documenting how to read SPD from UBOOT. Really geeky data that still needs to be decoded before it would be of any use at all.

Now off to argue with GCC for a while,
Lyle

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Re: A1222+ memory interleaving
Quite a regular
Quite a regular


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@sailor
Did you ever get the U-Boot sources for A1222+? Where can I get the sources of this U-Boot version?

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