Accessing xmos from os4

Just started to take a look at this X1000 thing. A couple of questions:

1. What is this co-processor for?
2. Will it have demonstrations (and code) available on the OS4.x install that runs on it, and when?
3. What developer tools/libraries will be available for OS4.x to exploit it, and when?

@DaveP

You can read up about it here:

http://www.xmos.com/applications

Basically it's a programmable event driven I/O chip.

@DaveP

3. is the most important question.

I hope full xcore developer kit will be available with AOS4 SDK!

Confirmation please?



(IIRC, it requires JAVA !)

Quote:

I believe its only the IDE listed at their website (Eclipse) that requires Java.

@Orgin

Thanks.

In general a true technologist will look at something like this and say ... hmm what can I use it for, and then work out how to use it.

But to prove it as a value add they really need to provide some form of demonstrations to inspire the rest - give them a taste of what is to come.

@DaveP

I am curious aswell

My questions would be
a) if (as some discussion brought up back when the chip was revealed) more of those chips (added with another - or to the same installed card) would add more power to the written application (as in make it run faster) and
b) if those possibility is available to the devs right from the start through an SDK and
c) in what way would such a programmable ("external") chip(s) differ in coding to it in regard to coding to a multi-core cpu (SMP)

Sorry for any dumb talk, just a noob question

IMO: A-eon would be smart if they could send one x1000 ASAP for Individual Computers to produce one or two example boards for xorro slot.
(like superb cheap (DIY possible) catweasel5)

Also Elbox might be interested.


UPDATE: I would like to have a 8 port atari joystic adapter + floppy drive port for Amiga HD floppies, thanks.

@Raziel

It's not made to run software, it's made to emulate (or innovate) I/O hardware.

It's not a CPU.

Check the link I provided earlier in this thread to understand what it's about.

@orgin

I can think of a few possible things this might do that is useful to business in general. Beyond that, dunno.

But if it can't be programmed from OS4, I wonder if it is going to get used by many?

@DaveP

I don't think very many will be developing for it. People might use products developed for it though, like a card with a clock port, digital joystick ports, midi, A4k keyboard connector or whatever legacy hardware people might be interested in connecting.

If the market were much much much larger there might be interest for more advanced stuff like a complete oscilloscope, complete c64 audio and display emulation and such. But suspect it will be hard to justify the amount of time needed to develop such stuff on such a small market.

@Raziel

>My questions would be
>a) if (as some discussion brought up back when the chip was revealed) more of those chips (added with another - or to the same installed card) would add more power to the written application (as in make it run faster) and

There is one core xcore chip on board of x1000 and the xorro slot is empty/free.
To my understanding, xorro slot has three xcore links to other xcore cores.
Every xcore core has 4 links.
So, we could have a xorro card with four xcore chips (that can have 1 or 4 internal xcores and 3to 12 links to other xcores) in direct connection to xena. Etc?
But let's first find and implement practical use for the first core inside xena.

(in future there could exist xcore chips that have 64 or 256 xcore cores, then the computational power might be more interesting, unless we have other more powerfull options, like those calculation units inside Ruby (the GPGPU of the x1000 that has minimum of 80 and maximum of 800 calculation units))

>b) if those possibility is available to the devs right from the start through an SDK and

If it's not initially, it must appear to the SDK ASAP ! Otherwise there will be disappointments, like with the lattice of SAM.

>c) in what way would such a programmable ("external") chip(s) differ in coding to it in regard to coding to a multi-core cpu (SMP)

If xcore's would be used for offloading CPU tasks, it would need to be accessed like powerUp/warpUp/datatypes did. But the methode is too slow and xcores are pretty slow when compared to the 64bit PPC of x1000.

But xcore should find some use in offloading I/O tasks from the CPU and in enabling flexible and custrom I/O.

btw.

In my latticeXP & xena idea thread i was thinking of implementing a system watchdog functionality to the xena/SAMlatticeXP.
http://amigaworld.net/modules/newbb/v ... p?topic_id=27379&forum=33

But to me it seems that x1000 already has watchdog...
btw. does anyone know how usable is the watchdog of PA6T SoC ?
Can it be used to trigger quicksave+reset if the user I/O etc. is in deadlock?

And... if AOS detects that the reset was caused by watchdog or otherwise spontaneously, it should give the user an option to track application data from RAM ... like possible unwritten disk cache. Or quicksave RAMTEMP, if it was used.

And while I'm in idea mood...

Amiga virus killers need to be ready to start fight against possible next gen Amiga viruses.

And to me it means that a virus killer must be running also on xcore, when the xcore is in Amiga!

@thread

If XMOS is reconfigurable hardware, does this mean that one can change eg a data bus from say 64bit to 128bit ?

Could a xmos change a single HD media processor bandwidth to double with 2 HD media processors ?

for example an VIA VX900 Media System Processor.

@angelheart

>If XMOS is reconfigurable hardware, does this mean that one can change eg a data bus from say 64bit to 128bit ?

No.
If I have understood it correctly, xena has about 40...50 free I/O pins. So it can read/write ~40bit parallel information.

I think the x1000 CPU already has 128bit interface to RAM and high bandwidth interfaces to other chips and PCI slots.

I guess the interface between PPC and xcore is well below 100Mb/sec, that's why it is inline with the PCIex1. (250Mb/sec???? via optional xorro-PCIex1 bridgecard)

>Could a xmos change a single HD media processor bandwidth to double with 2 HD media processors ?

I think one would need more xcore chips for that kind of thing.
Thinking of a NG videotoaster?

@KimmoK

But given most video editing and streams are purely digital these days why would you want videotoaster? Or do you mean delegating some pre/post processing to the chip?

@DaveP

>But given most video editing and streams are purely digital these days why would you want videotoaster?

For realtime digital video effects. (there are limits for pure SW implementation, especially if the SW runs on a non-hard-RTOS)

Notice: I'm not aware of what modern video chips are capable of doing, but I imagine things like audio-video sync when adding effects in runtime/live processing might not be too simple to get perfect...

(and multicore make things even harder/different, @ work it seems to break almost everything (Telecommunication with soft and hard realtime requirements))

@KimmoK

I was just thinking out loud of what possibilities could the xmos chips have

PC users are currently using 4-8 core cpus, 8GB ram and high end GFX cards to convert HD to x264/DVD etc.

We can play catchup or take a technological jump ahead.

@KimmoK

Quote:
I'm not a video guy either. So, , in my dreams......

It seems, in simplistic terms, that it should be possible to use the counters
and timers of Xmos to overlay video.

Lets say some 640x480 text is to be overlayed onto a 1024x768 background. So some
way would be needed to stretch the text for full screen display. Perhaps Xena
could be programed for a task like this. Since it's all digital it would be like
replacing background pixels with forground pixels before going to display.

Or something like that. ???