Hello, I wanted to compile a optimized version of my program for G5 / Pa-Semi PA6T, but compiler does not support -mcpu=970
Changes in GCC 4.8.
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PowerPC / PowerPC64 / RS6000 * SVR4 configurations (GNU/Linux, FreeBSD, NetBSD) no longer save, restore or update the VRSAVE register by default. The respective operating systems manage the VRSAVE register directly. * Large TOC support has been added for AIX through the command line option -mcmodel=large. * Native Thread-Local Storage support has been added for AIX. * VMX (Altivec) and VSX instruction sets now are enabled implicitly when targetting processors that support those hardware features on AIX 6.1 and above.
Changes in GCC 4.7
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PowerPC/PowerPC64 * Vectors of type vector long long or vector long are passed and returned using the same method as other vectors with the VSX instruction set. Previously GCC did not adhere to the ABI for 128-bit vectors with 64-bit integer base types (PR 48857). This will also be fixed in the GCC 4.6.1 and 4.5.4 releases. * A new option -mno-pointers-to-nested-functions was added to allow AIX 32-bit/64-bit and GNU/Linux 64-bit PowerPC users to specify that the compiler should not load up the chain register (r11) before calling a function through a pointer. If you use this option, you cannot call nested functions through a pointer, or call other languages that might use the static chain. * A new option msave-toc-indirect was added to allow AIX 32-bit/64-bit and GNU/Linux 64-bit PowerPC users control whether we save the TOC in the prologue for indirect calls or generate the save inline. This can speed up some programs that call through a function pointer a lot, but it can slow down other functions that only call through a function pointer in exceptional cases. * The PowerPC port will now enable machine-specific built-in functions when the user switches the target machine using the #pragma GCC target or __attribute__ ((__target__ ("target"))) code sequences. In addition, the target macros are updated. However, due to the way the -save-temps switch is implemented, you won't see the effect of these additional macros being defined in preprocessor output.
Changes in GCC 4.6
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PowerPC/PowerPC64 * GCC now supports the Applied Micro Titan processor with -mcpu=titan. * The -mrecip option has been added, which indicates whether the reciprocal and reciprocal square root instructions should be used. * The -mveclibabi=mass option can be used to enable the compiler to autovectorize mathematical functions using the Mathematical Acceleration Subsystem library. * The -msingle-pic-base option has been added, which instructs the compiler to avoid loading the PIC base register in function prologues. The PIC base register must be initialized by the runtime system. * The -mblock-move-inline-limit option has been added, which enables the user to control the maximum size of inlined memcpy calls and similar. PowerPC64 GNU/Linux support for applications requiring a large TOC section has been improved. A new command-line option, -mcmodel=MODEL, controls this feature; valid values for MODEL are small, medium, or large. * The Altivec builtin functions vec_ld and vec_st have been modified to generate the Altivec memory instructions LVX and STVX, even if the -mvsx option is used. In the initial GCC 4.5 release, these builtin functions were changed to generate VSX memory reference instructions instead of Altivec memory instructions, but there are differences between the two instructions. If the VSX instruction set is available, you can now use the new builtin functions vec_vsx_ld and vec_vsx_st which always generates the VSX memory instructions. * The GCC compiler on AIX now defaults to a process layout with a larger data space allowing larger programs to be compiled. * The GCC long double type on AIX 6.1 and above has reverted to 64 bit double precision, matching the AIX XL compiler default, because of missing C99 symbols required by the GCC runtime. * The default processor scheduling model and tuning for PowerPC64 GNU/Linux and for AIX 6.1 and above now is POWER7. * Starting with GCC 4.6.1, vectors of type vector long long or vector long are passed and returned in the same method as other vectors with the VSX instruction set. Previously the GCC compiler did not adhere to the ABI for 128-bit vectors with 64-bit integer base types (PR 48857). This is also fixed in the GCC 4.5.4 release.
Changes in GCC 4.5
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RS/6000 (POWER/PowerPC)
* GCC now supports the Power ISA 2.06, which includes the VSX instructions that add vector 64-bit floating point support, new population count instructions, and conversions between floating point and unsigned types. * Support for the power7 processor is now available through the -mcpu=power7 and -mtune=power7. * GCC will now vectorize loops that contain simple math functions like copysign when generating code for altivec or VSX targets. * Support for the A2 processor is now available through the -mcpu=a2 and -mtune=a2 options. * Support for the 476 processor is now available through the -mcpu={476,476fp} and -mtune={476,476fp} options. * Support for the e500mc64 processor is now available through the -mcpu=e500mc64 and -mtune=e500mc64 options. * GCC can now be configured with options --with-cpu-32, --with-cpu-64, --with-tune-32 and --with-tune-64 to control the default optimization separately for 32-bit and 64-bit modes. * Starting with GCC 4.5.4, vectors of type vector long long or vector long are passed and returned in the same method as other vectors with the VSX instruction set. Previously the GCC compiler did not adhere to the ABI for 128-bit vectors with 64-bit integer base types (PR 48857). This is also fixed in the GCC 4.6.1 release.
Changes in GCC 4.4
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Power Architecture and PowerPC
* GCC now supports the e300c2, e300c3 and e500mc processors. * GCC now supports Xilinx processors with a single-precision FPU. * Decimal floating point is now supported for e500 processors.
Changes in GCC 4.3
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RS6000 (POWER/PowerPC) * Support for the PowerPC 750CL paired-single instructions has been added with a new powerpc-*-linux*paired* target configuration. It is enabled by an associated -mpaired option and can be accessed using new built-in functions. * Support for auto-detecting architecture and system configuration to auto-select processor optimization tuning. * Support for VMX on AIX 5.3 has been added. * Support for AIX Version 6.1 has been added.
(NutsAboutAmiga)
Basilisk II for AmigaOS4 AmigaInputAnywhere Excalibur and other tools and apps.
Comments made in any post are personal opinion, and are in no-way representative of any commercial entity unless specifically stated as such. ---- http://codebench.co.uk
Yes thats what I was thinking too, I don't know if the versions SF.NET are working whit minor or major issues, or if there are versions ready for release or not.
(NutsAboutAmiga)
Basilisk II for AmigaOS4 AmigaInputAnywhere Excalibur and other tools and apps.
Reading the changelogs, it seems that most of the changes are related to AIX and Power based systems. I understand an updated version will bring the -mpcu=970 syntax but in what do you think that will increase performance? Have you found hot spots or instructions causing penalty? I am really interested in that.
Reading the changelogs, it seems that most of the changes are related to AIX
The changes logs is from offical GCC, So you will not find anything about AmigaOS in the changes logs I posted here, as adtools its not in official GCC.
I copied only from changes log that was interesting to PowerPC, not other fixes improvements and new features in the language, there are a few as well.
To clarify what a newer versions of GCC can do that current one cant.
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I understand an updated version will bring the -mpcu=970 syntax but in what do you think that will increase performance?
Yes, but might not run older CPU's but I don't care if does not run on Sam440, so not a issue, it might provide different compiles for different CPU's.
* Optimizing for AltiVec, in the C language, whit out any inline assembler, this mostly relates to the changes in GCC 4.6.x. * The support for 128bit vectors as float for higher precision calculations in GCC 4.6 and 4.7.
Well basically there is a lot of stuff that might make big difference when compiling.
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Have you found hot spots or instructions causing penalty? I am really interested in that.
Beside we are using a old GCC that might use some instructions that is illegal on the Pa-Semi, and it might slow down programs.
Now if I run Basilisk its running slower on my Pa-Semi then on my old G4 / AmigaONE-XE, some thing is not right.
The Pa-Semi 1.8 Ghz is higher clocked, has more CPU caches then G4 1Ghz, it should translate into being faster.
I do not know how to monitor illegal instruction hits that are emulated in AmigaOS, so I do not know if this is the case or not, but having a compiler that, can't or does not support the CPU you have can not possibly be a good thing.
Edited by LiveForIt on 2014/1/27 20:51:04 Edited by LiveForIt on 2014/1/27 20:52:39 Edited by LiveForIt on 2014/1/27 20:54:27
(NutsAboutAmiga)
Basilisk II for AmigaOS4 AmigaInputAnywhere Excalibur and other tools and apps.
I compiled a few different versions of gcc a few months back. They all had one problem in that binaries built for altivec that were made with the newer compiler, wouldn't work properly. I have no idea why, and couldn't find on adtools the exact 4.2.4 that's used in the SDK and zerohero's cross-compilers.
It's possible that the compiler I was using to build the compiler, is at fault. I'll give it another go sometime, building it inside a different Linux distro.
Edited by MickJT on 2014/1/29 16:28:45 Edited by MickJT on 2014/1/29 16:29:17